agilent AMMP-6530 5C 30 ghz image reject mixer data sheet description agilents AMMP-6530 is an image reject mixer that operates from 5 ghz to 30 ghz. the cold channel fet mixer is designed to be an easy-to-use component for any surface mount pcb applica- tion. it can be used drain pumped for low conversion loss applica- tions, or when gate pumped the mixer can provide high linearity for ssb up-conversion. an external 90-degree hybrid is used to achieve image rejection and a -1v voltage reference is needed. intended applications include microwave radios, 802.16, vsat, and satellite receivers. since this one mixer can cover several bands, the AMMP-6530 can reduce part inventory. the integrated mixer eliminates complex tuning and assembly processes typically required by hybrid (discrete-fet or diode) mixers. the package is fully smt compatible with backside ground- ing and i/o to simplify assembly. absolute maximum ratings [1] symbol parameters/conditions units min. max. v g gate supply voltage v 0 -3 p in cw input power dbm 15 t ch operating channel temperature c +150 t stg storage case temperature c -65 +150 t max max. assembly temp (60 sec max) c +300 note: 1. operation in excess of any one of these conditions may result in permanent damage to this device. features ? 5x5 mm surface mount package ? broad band performance 5 C 30 ghz ? low conversion loss of 8 db ? high image rejection of 15 C 20 db ? good 3rd order intercept of +18 dbm ? single -1v, no current supply bias applications ? microwave radio systems ? satellite vsat, dbs up/down link ? lmds & pt-pt mmw long haul ? broadband wireless access (including 802.16 and 802.20 wimax) ? wll and mmds loops ? commercial grade military 8 4 7 1 2 3 6 5 rf nc if1 nc if2 vg nc gate attention: observe precautions for handling electrostatic sensitive devices. esd machine model (class a) esd human body model (class 0) refer to agilent application note a004r: electrostatic discharge damage and control. top view package base: gnd pin function 1 if1 2 3 if2 4lo 5 6vg 7 8rf
2 AMMP-6530 typical performance [2, 3] (t a = 25 c, v g = -1v, if frequency = 1 ghz, z o =50 ? ) symbol parameters and test conditions units gate pumped drain pumped f rf rf frequency range ghz 5 C 30 5 C 30 f lo lo frequency range ghz 5 C 30 5 C 30 f if if frequency range ghz dc C 5 dc C 5 down conversion up conversion down conversion p lo lo port pumping power dbm >10 >0 >10 cg rf to if conversion gain db -10 -15 -8 rl_rf rf port return loss db 5 5 10 rl_lo lo port return loss db 10 10 5 rl_if if port return loss db 10 10 10 ir image rejection ratio db 15 15 15 lo-rf iso. lo to rf port isolation db 22 25 22 lo-if iso. lo to if port isolation db 25 25 25 rf-if iso. rf to if port isolation db 15 15 15 iip3 input ip3, fdelta=100 mhz, dbm 18 10 prf = -10 dbm, plo = 15 dbm p-1 input port power at 1db gain dbm 8 0 compression point, plo=+10 dbm nf noise figure db 10 12 notes: 2. small/large signal data measured in a fully de-embedded test fixture form t a = 25 c. 3. specifications are derived from measurements in a 50 ? test environment. AMMP-6530 rf specifications in drain pumped test configuration [4, 5, 6, 7] (t a = 25 c, v g = -1.0v, p lo = +10 dbm, z o = 50 ? ) symbol parameters and test conditions units typ. sigma cg conversion gain db -8 0.5 ir image rejection ratio db 20 1.0 notes: 4. pre-assembly into package performance verified 100% on-wafer. 5. 100% on-wafer rf testing is done at rf frequency = 7, 18, and 28 ghz; if frequency = 2 ghz. 6. this final package part performance is verified by a functional test correlated to actual performance. 7. the external 90 degree hybrid coupler is from m/a-com: pn 2032-6344-00. frequency 1.0 C 2.0 ghz. AMMP-6530 dc specifications/physical properties [1] symbol parameters and test conditions units typ. i g gate supply current (under any rf power drive and temperature) ma 0 v g gate supply operating voltage v -1v note: 1. ambient operational temperature t a =25 c unless otherwise noted.
3 AMMP-6530 typical performance under gate pumped down conversion operation (t a = 25 c, v g = -1v, z o = 50 ? ) figure 1. conversion gain with if terminated for low side conversion lo=+10 dbm, if=1 ghz. frequency (ghz) conversion gain (db) 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 530 15 10 20 25 usb(db) lsb(db) figure 2. conversion gain with if terminated for high side conversion lo=+10 dbm, if=1 ghz. frequency (ghz) conversion gain (db) 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 530 15 10 20 25 usb(db) lsb(db) figure 3. rf port input power p-1db. lo=+10 dbm, if=1 ghz. frequency (ghz) input power (db) 15 10 5 0 -5 530 15 10 20 25 figure 4. noise figure. lo=+7 dbm, if=1 ghz. frequency (ghz) noise figure (db) 20 15 10 5 0 530 15 10 20 25 figure 5. input 3rd order intercept point. if=1 ghz. frequency (ghz) iip3 (dbm) 25 20 15 10 5 530 15 10 20 25 plo=10(dbm) plo=15(dbm) figure 6. conversion gain vs. lo power. rf=21 ghz (-20 dbm), lo=20 ghz. lo power (dbm) conversion gain (db) 0 -5 -10 -15 -20 -25 -10 20 0 -5 5 10 15 8 4 7 1 2 3 6 5 drain rf lo lsb usb note: the external 90 hybrid coupler is from m/a-com: pn 2032-6344-00. frequency is 1.0 C 2.0 ghz. -1v nc if1 nc if2 vg nc gate
4 AMMP-6530 typical performance under gate pumped down conversion operation (t a = 25 c, v g = -1v, z o =50 ? ) figure 7. conversion gain and match vs. if frequency. rf=20 ghz, lo=10 dbm. frequency (ghz) conversion gain (db), return loss (db) 0 -5 -10 -15 -20 06 2 1 3 5 4 conv. gain (db) return loss (db) figure 8. conversion gain vs. gate voltage. rf=20 ghz, lo=10 dbm. vg (v) conversion gain (db) 0 -5 -10 -15 -20 -2 -0.5 -1.5 -1 figure 9. rf & lo return loss. lo=10 dbm. frequency (ghz) return loss (db) 0 -5 -10 -15 -20 030 15 10 5 20 25 rf lo figure 10. isolation. lo=+10 dbm, if=1 ghz. frequency (ghz) isolation (db) 60 50 40 30 20 10 0 530 15 10 20 25 rf-if lo-if lo-rf
5 figure 11. up-conversion gain with if terminated for low side conversion. lo=+5 dbm, if=+5 dbm, if=1 ghz. frequency (ghz) conversion gain (db) 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 530 15 10 20 25 usb (db) lsb (db) figure 12. up-conversion gain wth if terminated for high side conversion. lo=+5 dbm, if=+5 dbm, if=1 ghz. frequency (ghz) conversion gain (db) 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 530 15 10 20 25 usb (db) lsb (db) figure 13. lo-rf up-conversion isolation. frequency (ghz) isolation (db) 0 -5 -10 -15 -20 -25 -30 -35 -40 530 15 10 20 25 figure 14. up-conversion gain vs. pumping power. lo power=if power, if=1 ghz, rf=25 ghz. plo=pif (db) conversion loss (db) -5 -7 -9 -11 -13 -15 020 6 4 8 12 16 18 2 10 14 AMMP-6530 typical performance under gate pumped up conversion operation (t a = 25 c, v g = -1v, z o =50 ? ) 4 8 3 5 6 7 2 1 gate rf lo lsb usb -1v nc if2 nc if1 vg nc drain
6 AMMP-6530 typical performance under drain pumped down conversion operation (t a = 25 c, v g = -1v, z o = 50 ? ) figure 15. conversion gain with if terminated for low side conversion. lo=+10 dbm, if=1 ghz. frequency (ghz) conversion gain (db) 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 530 15 10 20 25 usb (db) lsb (db) figure 16. conversion gain with if terminated for high side conversion. lo=+10 dbm, if=1 ghz. frequency (ghz) conversion gain (db) 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 530 15 10 20 25 usb(dbm) lsb(dbm) figure 17. rf port input power p-1db. lo=+10 dbm, if=1 ghz. frequency (ghz) input power (dbm) 15 10 5 0 -5 530 15 10 20 25 figure 18. noise figure. lo=+7 dbm, if=1 ghz. frequency (ghz) noise figure (db) 20 15 10 5 0 530 15 10 20 25 figure 19. input 3rd order intercept point. if=1 ghz. flo (db) iip3 (dbm) 25 20 15 10 5 0 530 15 10 20 25 plo=10(dbm) plo=15(dbm) figure 20. conversion gain vs. lo power. rf=21 ghz (-20 dbm), lo=20 ghz. lo power (dbm) conversion gain (db) 0 -5 -10 -15 -20 -25 -10 20 0 -5 5 10 15 8 4 7 1 2 3 6 5 drain usb lsb note: the external 90 hybrid coupler is from m/a-com: pn 2032-6344-00. frequency is 1.0 C 2.0 ghz. -1v nc if1 nc if2 vg nc gate rf lo
biasing and operation the recommended dc bias condition for optimum performance, and reliability is vg = -1 volts. there is no current consumption for the gate biasing because the fet mixer was designed for passive operation. for down conversion, the AMMP-6530 may be configured in a low loss or high linearity application. in a low loss configu- ration, the lo is applied through the drain (pin8, power divider side). in this configuration, the AMMP-6530 is a drain pumped mixer. for higher linearity applications, the lo is applied through the gate (pin4, lange coupler side). in this configura- tion, the AMMP-6530 is a gate pumped mixer (or resistive mixer). the mixer is also suitable for up-conversion applications under the gate pumped mixer operation shown on page 3. please note that the image rejection and isolation perfor- mance is dependent on the selection of the low frequency quadrature hybrid. the perfor- mance specification of the low frequency quadrature hybrid as well as the phase balance and vswr of the interface to the AMMP-6530 will affect the overall mixer performance. figure 21. simplified mmic schematic. figure 22. demonstration board (available upon request). if1 if2 rf/lo lo/rf gn d vg 8 4 7 1 2 3 6 5 rf nc if1 nc if2 vg nc gate gnd vg if1 if2 rf/lo lo/rf
8 recommended smt attachment the ammp packaged devices are compatible with high volume surface mount pcb assembly processes. the pcb material and mounting pattern, as defined in the data sheet, optimizes rf performance and is strongly recommended. an electronic drawing of the land pattern is available upon request from agilent sales & application engineering. manual assembly 1. follow esd precautions while handling packages. 2. handling should be along the edges with tweezers. 3. recommended attachment is conductive solder paste. please see recommended solder reflow profile. conduc- tive epoxy is not recom- mended. hand soldering is not recommended. 4. apply solder paste using a stencil printer or dot place- ment. the volume of solder paste will be dependent on pcb and component layout and should be controlled to ensure consistent mechanical and electrical performance. 5. follow solder paste and vendors recommendations when developing a solder reflow profile. a standard profile will have a steady ramp up from room temperature to the pre-heat temperature to avoid damage due to thermal shock. 6. packages have been qualified to withstand a peak tempera- ture of 260 c for 20 seconds. verify that the profile will not expose device beyond these limits. figure 24. suggested pcb material and land pattern. dimensions in inches [mm]. material is rogers r04350, 0.010" thick. figure 23. outline drawing. dimensional tolerances: 0.002" [0.05 mm] 123 765 321 567 .200 [5.08] .200 [5.08] 84 .075 [1.91] .114 [2.9] .014 [0.365] .016 [0.40] .012 [0.30] .028 [0.70] .093 [2.36] .016 [0.40] .100 [2.54] .011 [0.28] .018 [0.46] .126 [3.2] .059 [1.5] .100 [2.54] .029 [0.75] 4 8 front view side view back view notes: 1. * indicates pin 1 2. dimensions are in inches [millimeters] 3. all grounds must be soldered to pcb rf ground .093 [2.36] .010 [0.25] .011 [0.28] .126 [3.20] .059 [1.50] .020 [0.50] .018 [0.46] .018 [0.46] .114 [2.90] .0095 [0.24] .012 [0.3] ground vias should be solder filled. .016 [0.40] .0095 [0.24] .016 [0.40]
9 solder reflow profile the most commonly used solder reflow method is accomplished in a belt furnace using convection heat transfer. the suggested reflow profile for automated reflow processes is shown in figure 25. this profile is designed to ensure reliable finished joints. however, the profile indicated in figure 25 will vary among different solder pastes from different manufacturers and is shown here for reference only. stencil design guidelines a properly designed solder screen or stencil is required to ensure optimum amount of solder paste is deposited onto the pcb pads. the recommended stencil layout is shown in figure 26. the stencil has a solder paste deposition opening approxi- mately 70% to 90% of the pcb pad. reducing stencil opening can potentially generate more voids underneath. on the other hand, stencil openings larger than 100% will lead to excessive solder paste smear or bridging across the i/o pads. considering the fact that solder paste thick- ness will directly affect the quality of the solder joint, a good choice is to use a laser cut stencil composed of 0.127 mm (5 mils) thick stainless steel which is capable of producing the re- quired fine stencil outline. the combined pcb and stencil layout is shown in figure 27. figure 25. suggested lead-free reflow profile for snagcu solder paste. figure 26. stencil outline drawing (mm). figure 27. combined pcb and stencil layouts (mm). 0 50 100 150 200 250 300 0 50 100 150 200 250 300 seconds temp ( c) ramp 1 preheat ramp 2 reflow cooling peak = 250 5 c melting point = 218 c 0.3 0.4 0.7 0.2 0.3 4x - r0.14 0.9 0.3 0.6 1.6 0.95 1.8 3.20 1.80 0.40 0.36 2.90 1.60 stencil opening 0.30 0.27 0.40 0.36 0.46 0.40 0.60 0.67
part number ordering information devices part number per container container AMMP-6530-blk 10 antistatic bag AMMP-6530-tr1 100 7 reel AMMP-6530-tr2 500 7 reel www.agilent.com/semiconductors for product information and a complete list of distributors, please go to our web site. for technical assistance call: americas/canada: +1 (800) 235-0312 or (916) 788-6763 europe: +49 (0) 6441 92460 china: 10800 650 0017 hong kong: (65) 6756 2394 india, australia, new zealand: (65) 6755 1939 japan: (+81 3) 3335-8152(domestic/international), or 0120-61-1280(domestic only) korea: (65) 6755 1989 singapore, malaysia, vietnam, thailand, philippines, indonesia: (65) 6755 2044 taiwan: (65) 6755 1843 data subject to change. copyright ? 2005 agilent technologies, inc. february 24, 2005 5989-2352en device orientation (top view) carrier tape and pocket dimensions
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